CVE-2023-34326
High
Description
The caching invalidation guidelines from the AMD-Vi specification (48882—Rev 3.07-PUB—Oct 2022) is incorrect on some hardware, as devices will malfunction (see stale DMA mappings) if some fields of the DTE are updated but the IOMMU TLB is not flushed. Such stale DMA mappings can point to memory ranges not owned by the guest, thus allowing access to unindented memory regions.
SeverityHigh
CVSS7.8
Exploit probability—
ProductXen
PublishedJan 5, 2024
First seenJan 5, 2024
Weakness typeCWE-672CWE-672
How to fix
Sources list no fixed version or patch link for this vulnerability.
Affected products
| Product | Affected versions | Fixed in |
|---|---|---|
| xen xen | No range specified | — |
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